The Koyomi LVDS HAT passed a clean KiCad design-rule check, but JLCPCB still found a fabrication problem: the sixteen pads across filters FL1 and FL2 had no front solder-mask openings.

The footprint declared each pad on F.Cu and F.Paste, but omitted F.Mask. Copper existed. Paste apertures existed. The mask would cover the pads, making the filters impossible to solder normally.

Why DRC passed

KiCad’s DRC verifies many geometric and electrical rules, but it does not prove that every surface-mount pad has a usable mask aperture. The design was internally consistent while still being physically wrong.

This is an important distinction: passing a tool’s checks is not the same as proving manufacturability.

Verifying the repair

The source footprint and both placed filter instances were corrected to include F.Mask. Exporting the mask layer before and after the change produced 197 → 213 flashes—exactly sixteen new openings at the expected coordinates and nowhere else.

That count is stronger evidence than “the render looks right.” It defines the expected delta and verifies that the fix did not disturb unrelated apertures.

What belongs in the release gate

For small boards, add these checks beside DRC/ERC:

  1. Inspect paste and mask layers independently.
  2. Compare generated outputs against the previous release.
  3. Confirm every fitted SMD pad has the intended paste and mask treatment.
  4. Review manufacturer warnings rather than dismissing them because DRC is green.
  5. Tie the outputs and reports to one source commit.

The corrected source is public in the Koyomi LVDS HAT repository. The root Gerber snapshot remains upstream’s pre-fix export, so it must be regenerated before fabrication.