open-source

OSSC Pro RAM board

Open low-latency pseudo-SRAM expansion board for OSSC Pro FPGA modes.

Remix this board → View source on GitHub ↗

License: CERN-OHL-P-2.0
Default branch: master
Last mirror: Sep 6, 2026
Git commit: de843c1e1fa0

About OSSC Pro RAM board

Open low-latency pseudo-SRAM expansion board for OSSC Pro FPGA modes.

Published design files

Open Source Scan Converter third-party mod
Open source (CERN-OHL-P-2.0)
Mirrored at de843c1e1fa0

Canonical source stays in the upstream git repository (and in WalGit after a successful mirror push). Generated renders and 3D models use artifacts/mods/ossc/ossc-pro-ram-board on the artifact CDN and are not checked into git.